The present invention relates to a semiconductor imaging device employing an SIT (Static Induction Transistor) as a pixel unit. More particularly, the invention relates to the structure in such a device of a capacitor on a control gate where photocarriers are stored.
A pixel having a new structure was recently proposed in Japanese Patent Application No. 157693/82. This pixel is composed of an SIT having two gates, one a control gate acting as a photocell and the other a shielding gate used to isolate pixels and adjust their sensitivity. This pixel functions as a light detector that operates in response to a pulse input with the use of a blocking capacitor to limit the d.c. component of the current flowing through the control gate. In addition to structural simplicity, this pixel has a high gain and has a large noise margin. Furthermore, this pixel is capable of high-speed operation and permits the sensitivity to be controlled by purely electronic means.
The blocking capacitor mentioned above, which is used to store photocarriers, is an important element that determines the overall characteristics of the pixel. When an SIT is used as a pixel unit for forming a semiconductor imaging device, the carrier storage capacitor connected to the control gate of the transistor is required to meet the following requirements:
(1) The area of the capacitor cannot be greater than the size of the control gate. This means that the area of the capacitor is limited by the area of a pixel unit. On the other hand, the demand for reducing the size of pixel is ever increasing.
(2) In order to maintain the ability to store photocarriers, the capacitor must employ an insulating layer that has low leadage current characteristic.
(3) For practical purposes of signal reading, the imaging device must operate consistently with a fairly small pulsive voltage. To this end, capacitors having the desired capacitance must be easily produced.
(4) From a process viewpoint, the capacitor should have a simple structure.
These requirements are well recognized by IC manufacturers, but the specific capacitor configuration that produces optimum results has been entirely unknown.
It has recently been confirmed that with an imaging device using SITs, a pixel producing a greater output can be fabricated by increasing the capacitance of the capacitor, provided that it is within a certain range. Therefore, the provision of good capacitor having a large capacitance has been a very important prerequisite for manufacturing high-efficiency pixels using SITs.
The primary object of the present invention is to provide a semiconductor imaging device employing an SIT pixel which has in the control gate region a capacitor having optimum properties, namely, a small leakage current (within an allowed tolerance), large capacitance and good quality.